EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 328

• Manufacturer Part Number: EP1S40B956C5
• Description: IC STRATIX FPGA 40K LE 956-BGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S40B956C5

• Number Of Logic Elements/cells: 41250
• Number Of Labs/clbs: 4125
• Total Ram Bits: 3423744
• Number Of I /o: 683
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 956-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Enhanced PLLs
Figure 1–7. extclkena Signals
1–18
Stratix Device Handbook, Volume 2
COUNTER
OUTPUT
CLKENA
CLKOUT
Programmable Bandwidth
Enhanced PLLs provide advanced control of the PLL bandwidth using
the programmable characteristics of the PLL loop, including loop filter
and charge pump.
Background
The PLL bandwidth is the measure of the PLLs ability to track the input
clock and jitter. It is determined by the 3-dB frequency of the closed-loop
gain in the PLL or approximately the unity gain point for open loop PLL
response. As
the same frequency.
Figure 1–8
shows, these points correspond to approximately
Altera Corporation
July 2005