EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 801
EP1S40B956C5
Manufacturer Part Number
EP1S40B956C5
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S40B956C5
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S40B956C5
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- Current page: 801 of 864
- Download datasheet (11Mb)
Altera Corporation
September 2004
3.
4.
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6.
7.
8.
Select the enhanced configuration device used (EPC4, EPC8,
EPC16), and the mode used (1-bit Passive Serial or Fast Passive
Parallel). Only during the initial programming file generation can
you specify the Options, Configuration Device, or Mode settings.
While generating the partial programming file, all of these settings
are grayed out and inaccessible.
In the Input files to convert box, highlight SOF Data at Page 0 and
click Add File. Select input SOF file(s) for this configuration page
and insert them.
Repeat Step 4 for the Page 1 application configuration page.
Check the Memory Map File box to generate a memory map output
file that specifies the start/end addresses of each configuration page
and user data blocks.
Save the CPF setup (optionally), by selecting Save Conversion
Setup… and specifying a name for the .cof output file.
Click OK to generate initial programming and memory map files.
Remote System Configuration with Stratix & Stratix GX Devices
Stratix Device Handbook, Volume 2
12–23
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