EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 355
![IC STRATIX FPGA 40K LE 956-BGA](/photos/6/73/67334/544-stratix_956-bga_sml.jpg)
EP1S40B956C5
Manufacturer Part Number
EP1S40B956C5
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S40B956C5
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S40B956C5
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- Current page: 355 of 864
- Download datasheet (11Mb)
Altera Corporation
July 2005
Notes to
(1)
(2)
(3)
(4)
(5)
RCLK6
RCLK7
RCLK8
RCLK9
RCLK10
RCLK11
RCLK12
RCLK13
RCLK14
RCLK15
External Clock Output
PLL5_OUT
[3..0]p/n
PLL6_OUT
[3..0]p/n
PLL11_OUT
(3)
PLL12_OUT
(4)
Table 1–15. Stratix Global & Regional Clock Output Line Sharing for Enhanced & Fast PLLs (Part 2 of 2)
Network
Clock
This is a fast PLL.
This is an enhanced PLL.
This pin is a tri-purpose pin; it can be an I/O pin, CLK13n, or used for PLL 11 output.
This pin is a tri-purpose pin; it can be an I/O pin, CLK7n, or used for PLL 12 output.
The EP1S40 device in the F780 package does not support PLLs 11 and 12.
Table
1–15:
PLL 1
(1)
PLL 2
(1)
PLL 3
All Devices
(1)
v
v
v
v
PLL 4
(1)
v
v
v
v
PLL 5
(2)
v
v
v
General-Purpose PLLs in Stratix & Stratix GX Devices
PLL 6
(2)
v
v
v
v
v
PLL 7
EP1S30, EP1S40, EP1S60 &
(1)
EP1S80 Devices Only
PLL 8
Stratix Device Handbook, Volume 2
(1)
9
PLL
v
v
(1)
10
PLL
v
v
(1)
11
Devices Only
EP1S40 (5),
PLL
v
v
v
EP1S60 &
EP1S80
(2)
12
PLL
v
v
v
v
v
1–45
(2)
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