IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 56

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Functional Description
3–18
PCI Express Compiler User Guide
Type 0 configuration registers (see
Reserved
MSI capability structure (see
Reserved
Power management capability structure (see
PCI Express capability structure (see
Reserved
Virtual channel capability structure (see
Reserved
Virtual channel arbitration table
Reserved
AER (optional)
Reserved
Port VC0 arbitration table (Reserved)
Port VC1 arbitration table (Reserved)
Port VC2 arbitration table (Reserved)
Port VC3 arbitration table (Reserved)
Port VC4 arbitration table (Reserved)
Port VC5 arbitration table (Reserved)
Port VC6 arbitration table (Reserved)
Port VC7 arbitration table (Reserved)
Table 3–4. Common Configuration Space Header
31:24
Table 3–6
Configuration Space Register Content
This section describes the configuration space registers. See chapter 7 of
the PCI Express Base Specification Revision 1.0a for more details.
Table 3–4
tables provide more details.
23:16
Table 3–5
PCI Express Compiler Version 6.1
Table 3–8
for details.)
Table 3–9
shows the common configuration space header. The following
Table 3–7
for details.)
for details.)
for details.)
15:8
for details.)
7:0
Altera Corporation
000h..03Ch
180h..1FCh
2C0h..2FCh
3C0h..3FCh
040h..04Ch
050..05Ch
060h..074h
078..07Ch
080h..0A0h
0A4h..0FCh
100h..16Ch
170h..17Ch
200h..23Ch
240h..27Ch
280h..2BCh
300h..33Ch
340h..37Ch
380h..3BCh
400h..7FCh
800..834
838..FFF
December 2006
Byte Offset