IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 144

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

External PHY Support
4–12
PCI Express Compiler User Guide
rxstatus1_ext[1:0]
rxvalid1_ext
txcompl1_ext
txdata1_ext[15:0]
txdatak1_ext[1:0]
txelecidle1_ext
rxdata2_ext[15:0]
rxdatak2_ext[1:0]
rxelecidle2_ext
rxpolarity2_ext
rxstatus2_ext[1:0]
rxvalid2_ext
txcompl2_ext
txdata2_ext[15:0]
txdatak2_ext[1:0]
txelecidle2_ext
rxdata3_ext[15:0]
rxdatak3_ext[1:0]
rxelecidle3_ext
rxpolarity3_ext
rxstatus3_ext[1:0]
rxvalid3_ext
txcompl3_ext
txdata3_ext[15:0]
txdatak3_ext[1:0]
txelecidle3_ext
Table 4–2. 16-bit PHY Interface Signals (Part 2 of 2)
Signal Name
O
I
I
O
I
I
O
Direction
I
I
O
O
O
I
O
I
I
O
O
O
I
O
I
I
O
O
O
PCI Express Compiler Version 6.1
PIPE Interface Lane 1 Rx Status flags.
PIPE Interface Lane 1 Rx Valid indication
PIPE Interface Lane 1 Tx Compliance control
PIPE Interface Lane 1 Tx Data signals, carries
the parallel transmit data.
PIPE Interface Lane 1 Tx Data K-character flags. Only in x4
PIPE Interface Lane 1 Tx Electrical Idle Control
PIPE Interface Lane 2 Rx Data signals, carries
the parallel received data.
PIPE Interface Lane 2 Rx Data K-character flags. Only in x4
PIPE Interface Lane 2 Rx Electrical Idle
Indication.
PIPE Interface Lane 2 Rx Polarity Inversion
Control
PIPE Interface Lane 2 Rx Status flags.
PIPE Interface Lane 2 Rx Valid indication
PIPE Interface Lane 2 Tx Compliance control
PIPE Interface Lane 2 Tx Data signals, carries
the parallel transmit data.
PIPE Interface Lane 2 Tx Data K-character flags. Only in x4
PIPE Interface Lane 2 Tx Electrical Idle Control
PIPE Interface Lane 3 Rx Data signals, carries
the parallel received data.
PIPE Interface Lane 3 Rx Data K-character flags. Only in x4
PIPE Interface Lane 3 Rx Electrical Idle
Indication.
PIPE Interface Lane 3 Rx Polarity Inversion
Control
PIPE Interface Lane 3 Rx Status flags.
PIPE Interface Lane 3 Rx Valid indication
PIPE Interface Lane 3 Tx Compliance control
PIPE Interface Lane 3 Tx Data signals, carries
the parallel transmit data.
PIPE Interface Lane 3 Tx Data K-character flags. Only in x4
PIPE Interface Lane 3 Tx Electrical Idle Control
Description
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Only in x4
Altera Corporation
Availability
December 2006