IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 197

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Testbench & Example Designs
Altera Corporation
December 2006
SHMEM_FILL_ZEROS
SHMEM_FILL_BYTE_INC
SHMEM_FILL_WORD_INC
SHMEM_FILL_DWORD_INC
SHMEM_FILL_QWORD_INC
SHMEM_FILL_ONE
Syntax
Arguments
Table 5–29. Constants: VHDL Subtype NATURAL or Verilog HDL Type INTEGER
Table 5–30. shmem_write VHDL Procedure or Verilog HDL Task
Constant
shmem_write(addr, data, leng)
addr
data
leng
Shared Memory Constants
The following constants are defined in the BFM shared memory package.
They select a data pattern in the shmem_fill and shmem_chk_ok
routines. These shared memory constants are all VHDL subtype
NATURAL or Verilog HDL type INTEGER.
shmem_write
The shmem_write procedure writes data to the BFM shared memory.
Specifies a data pattern of all zeros
Specifies a data pattern of incrementing 8-bit bytes (0x00, 0x01, 0x02, etc.)
Specifies a data pattern of incrementing 16-bit words (0x0000, 0x0001,
0x0002, etc.)
Specifies a data pattern of incrementing 32-bit double words (0x00000000,
0x00000001, 0x00000002, etc.)
Specifies a data pattern of incrementing 64-bit quad words
(0x0000000000000000, 0x0000000000000001, 0x0000000000000002, etc.)
Specifies a data pattern of all ones
BFM shared memory starting address for writing data
Data to write to BFM shared memory.
In VHDL, this argument is an unconstrained
vector must be 8 times the
In Verilog, this parameter is implemented as a 64-bit vector.
leng
In both languages, bits 7 downto 0 are written to the location specified by
addr
Length, in bytes, of data written
PCI Express Compiler Version 6.1
; bits 15 downto 8 are written to the
is 1- 8 bytes.
leng
Description
long.
PCI Express Compiler User Guide
addr+1
std_logic_vector
location, etc.
. This
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