IPR-PCIE/8 Altera, IPR-PCIE/8 Datasheet - Page 31

• Manufacturer Part Number: IPR-PCIE/8
• Description: IP CORE Renewal Of IP-PCIE/8
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCIE/8

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x8 Link Width
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Getting Started
Figure 2–7. Power Management Page
Altera Corporation
December 2006
5.
6.
7.
Set Up Simulation
An IP functional simulation model is a cycle-accurate VHDL or Verilog
HDL model produced by the Quartus II software. The model allows for
fast functional simulation of IP using industry-standard VHDL and
Verilog HDL simulators.
The Power Management page opens. Make the appropriate
settings. See
To apply the settings, click Finish.
Click Next (or the Simulation Model page) to display the
simulation setup page (see
PCI Express Compiler Version 6.1
Figure
2–7.
Figure
2–8).
PCI Express Compiler User Guide
2–9