DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 774

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev. 5.00 Mar. 06, 2009 Page 754 of 770
REJ09B0243-0500
Item
13.7.4 Range of Analog Power
Supply and Other Pin Settings
Section15 Pin Function
Controller (PFC)
Table 15.1 SH7125 Multiplexed
Pins
Table 15.2 SH7124 Multiplexed
Pins
Page Revision (See Manual for Details)
502
515
516
517
518
Table amended
Note added
Notes: 1. During A/D conversion, the AN input function
Table amended
Note added
Notes: 1. During A/D conversion, the AN input function
Description amended
•
Port
A
Port
A
Relationship between AVcc, AVss and Vcc, Vss
Set Vcc ≤ AVcc ≤ 5.5V, AVss = Vss for the
relationship between AVcc, AVss and Vcc, Vss. If
the A/D converter is not used, the AVcc and AVss
pins must not be left open.
Function 1
(Related Module)
PA3 I/O (port)
PA4 I/O (port)
PA7 I/O (port)
PA8 I/O (port)
PA9 I/O (port)
Function 1
(Related Module)
PA0 I/O (port)
PA1 I/O (port)
PA3 I/O (port)
PA4 I/O (port)
PA6 I/O (port)
PA7 I/O (port)
PA8 I/O (port)
PA9 I/O (port)
2. These functions (TRST, TMS, TCK, TDI, and
2. These functions (TRST, TMS, TCK, TDI, and
is enabled.
TDO) are not supported on the 32 Kbyte
versions (SH71251A and SH71241A) and 16
Kbyte versions (SH71250A and SH71240A).
is enabled.
TDO) are not supported on the 32 Kbyte
versions (SH71251A and SH71241A) and 16
Kbyte versions (SH71250A and SH71240A).
Function 2
(Related Module)
IRQ1 input (INTC)
IRQ2 input (INTC)
TCLKB input (MTU2)
TCLKC input (MTU2)
TCLKD input (MTU2)
Function 2
(Related Module)
POE0 input (POE)
POE1 input (POE)
IRQ1 input (INTC)
IRQ2 input (INTC)
TCLKA input (MTU2)
TCLKB input (MTU2)
TCLKC input (MTU2)
TCLKD input (MTU2)
TXD1 output (SCI)
TXD1 output (SCI)
Function 3
(Related Module)
RXD1 input (SCI)
SCK2 I/O (SCI)
RXD2 input (SCI)
TXD2 output (SCI)
Function 3
(Related Module)
RXD0 input (SCI)
TXD0 output (SCI)
RXD1 input (SCI)
SCK2 I/O (SCI)
RXD2 input (SCI)
TXD2 output (SCI)
Function 4
(Related Module)
TRST input (H-UDI)*
TMS input (H-UDI)*
TCK input (H-UDI)*
TDI input (H-UDI)*
POE8 input (POE)
Function 4
(Related Module)
TRST input (H-UDI)*
TMS input (H-UDI)*
TCK input (H-UDI)*
TDI input (H-UDI)*
POE8 input (POE)
2
2
2
2
2
2
2
2
Function 5
(Related Module)
TDO output (H-UDI)*
Function 5
(Related Module)
TDO output (H-UDI)*
2
2