DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 416

MCU RISC FLASH 32K 8K 64LQFP

DF71251AD50FPV

Manufacturer Part Number
DF71251AD50FPV
Description
MCU RISC FLASH 32K 8K 64LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH Tinyr
Datasheet

Specifications of DF71251AD50FPV

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
SCI
Peripherals
POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF71251AD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Note:
10.3.6
POECR2 is a 16-bit readable/writable register that controls high-impedance state of the pins.
Initial value:
Rev. 5.00 Mar. 06, 2009 Page 396 of 770
REJ09B0243-0500
Bit
0
Bit
15
14
Note:
R/W:
Bit:
*
* Can be modified only once after a power-on reset.
Can be modified only once after a power-on reset.
Bit Name
MTU2PE0ZE
Bit Name
MTU2P1CZE
Port Output Enable Control Register 2 (POECR2)
15
R
0
-
R/W* R/W* R/W*
P1CZE
MTU2
14
1
P2CZE
MTU2
13
1
Initial
value
0
Initial
value
0
1
P3CZE
MTU2
12
1
11
R
0
-
R/W
R/W*
R/W
R
R/W*
R/W* R/W* R/W*
10
1
-
9
1
Description
MTU2 PE0 High-Impedance Enable
This bit specifies whether to place the PE0/TIOC1A
pin for channel 0 in the MTU2 in high-impedance
state when either POE8F or MTU2CH0HIZ bit is set
to 1.
0: Does not place the pin in high-impedance state
1: Places the pin in high-impedance state
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
MTU2 Port 1 Output Comparison/High-Impedance
Enable
This bit specifies whether to compare output levels for
the MTU2 high-current PE9/TIOC3B and
PE11/TIOC3D pins and to place them in high-
impedance state when the OSF1 bit is set to 1 while
the OEC1 bit is 1 or when any one of the POE0F,
POE1F, POE3F, and MTU2CH34HIZ bits is set to 1.
0: Does not compare output levels or place the pins in
1: Compares output levels and places the pins in
-
high-impedance state
high-impedance state
8
1
-
R
7
0
-
R
6
0
-
R
5
0
-
R
4
0
-
R
3
0
-
R
2
0
-
R
1
0
-
R
0
0
-

Related parts for DF71251AD50FPV