DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 502

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev. 5.00 Mar. 06, 2009 Page 482 of 770
REJ09B0243-0500
Bit
14
13, 12
11
10
9
Bit Name
ADIE
⎯
TRGE
⎯
CONADF
Initial
Value
0
All 0
0
0
0
R/W
R/W
R
R/W
R
R/W
Description
A/D Interrupt Enable
The A/D conversion end interrupt (ADI) request is
enabled when 1 is set
When changing the operating mode, first clear the
ADST bit to 0.
Reserved
These bits are always read as 0. The write value
should always be 0.
Trigger Enable
Enables or disables triggering of A/D conversion by
ADTRG and an MTU2 trigger.
0: A/D conversion triggering is disabled
1: A/D conversion triggering is enabled
When changing the operating mode, first clear the
ADST bit to 0.
Reserved
This bit is always read as 0. The write value should
always be 0.
ADF Control
Controls setting of the ADF bit in 2-channel scan
mode. The setting of this bit is valid only when
triggering of A/D conversion is enabled (TRGE = 1) in
2-channel scan mode. The setting of this bit is ignored
in single mode or 4-channel scan mode.
0: The ADF bit is set when A/D conversion started by
1: The ADF bit is set when A/D conversion started by
When changing the operating mode, first clear the
ADST bit to 0.
the group 0 trigger or group 1 trigger has finished.
the group 0 trigger and A/D conversion started by
the group 1 trigger have both finished. Note that the
triggering order has no affect.