DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 254
DF71251AD50FPV
Manufacturer Part Number
DF71251AD50FPV
Description
MCU RISC FLASH 32K 8K 64LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH Tinyr
Datasheet
1.DF71243N50FPV.pdf
(794 pages)
Specifications of DF71251AD50FPV
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
SCI
Peripherals
POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF71251AD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 254 of 794
- Download datasheet (5Mb)
9.3.29
TDER is an 8-bit readable/writable register that controls dead time generation in complementary
PWM mode. The MTU2 has one TDER in channel 3. TDER must be modified only while TCNT
stops.
Note:
Rev. 5.00 Mar. 06, 2009 Page 234 of 770
REJ09B0243-0500
Bit
7 to 1
0
* TDDR must be set to 1 or a larger value.
Bit Name
—
TDER
Timer Dead Time Enable Register (TDER)
Initial value:
Initial
Value
All 0
1
R/W:
Bit:
R
7
0
-
R/W
R
R/(W)
R
6
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Specifies whether to generate dead time.
0: Does not generate dead time
1: Generates dead time*
[Clearing condition]
•
Dead Time Enable
R
5
0
-
When 0 is written to TDER after reading TDER = 1
R
4
0
-
R
3
0
-
R
2
0
-
R
1
0
-
R/(W)
TDER
0
1
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