DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 163

MCU RISC FLASH 32K 8K 64LQFP

DF71251AD50FPV

Manufacturer Part Number
DF71251AD50FPV
Description
MCU RISC FLASH 32K 8K 64LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH Tinyr
Datasheet

Specifications of DF71251AD50FPV

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
SCI
Peripherals
POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF71251AD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(Example 1-5)
• Register specifications
(Example 1-6)
• Register specifications
<Channel B>
Address:
Data:
Bus cycle: L bus/instruction fetch (before instruction execution)/read/word
Since instruction fetch is not a write cycle on channel A, a sequential condition does not
match. Therefore, no user break occurs.
BARA = H'00000500, BAMRA = H'00000000, BBRA = H'0057, BDRA = H'00000000,
BDMRA = H'00000000, BARB = H'00001000, BAMRB = H'00000000, BBRB = H'0057,
BDRB = H'00000000, BDMRB = H'00000000, BRCR = H'00000001, BETR = H'0005
Specified conditions: Channel A/channel B independent mode
<Channel A>
Address:
Data:
Bus cycle: L bus/instruction fetch (before instruction execution)/read/longword
The number of execution-times break enable (5 times)
<Channel B>
Address:
Data:
Bus cycle: L bus/instruction fetch (before instruction execution)/read/longword
On channel A, a user break occurs after the instruction of address H'00000500 is executed four
times and before the fifth time.
On channel B, a user break occurs before an instruction of address H'00001000 is executed.
BARA = H'00008404, BAMRA = H'00000FFF, BBRA = H'0054, BDRA = H'00000000,
BDMRA = H'00000000, BARB = H'00008010, BAMRB = H'00000006, BBRB = H'0054,
BDRB = H'00000000, BDMRB = H'00000000, BRCR = H'00000400
Specified conditions: Channel A/channel B independent mode
<Channel A>
Address:
Data:
H'0003722E, Address mask: H'00000000
H'00000000, Data mask: H'00000000
H'00000500, Address mask: H'00000000
H'00000000, Data mask: H'00000000
H'00001000, Address mask: H'00000000
H'00000000, Data mask: H'00000000
H'00008404, Address mask: H'00000FFF
H'00000000, Data mask: H'00000000
Rev. 5.00 Mar. 06, 2009 Page 143 of 770
REJ09B0243-0500

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