DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 47

• Manufacturer Part Number: DF71251AD50FPV
• Description: MCU RISC FLASH 32K 8K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Tinyr

Specifications of DF71251AD50FPV

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Addressing
Mode
Register
indirect with
displacement
Index
register indirect
GBR indirect
with
displacement
Index GBR
indirect
Instruction
Format
@(disp:4,
Rn)
@(R0, Rn) Effective address is sum of register Rn and R0
@(disp:8,
GBR)
@(R0,
GBR)
Effective Address Calculation Method
Effective address is register Rn contents with
4-bit displacement disp added. After disp is
zero-extended, it is multiplied by 1 (byte), 2
(word), or 4 (longword), according to the
operand size.
contents.
Effective address is register GBR contents with
8-bit displacement disp added. After disp is
zero-extended, it is multiplied by 1 (byte), 2
(word), or 4 (longword), according to the
operand size.
Effective address is sum of register GBR and
R0 contents.
(zero-extended)
(zero-extended)
GBR
1/2/4
1/2/4
disp
GBR
Rn
Rn
R0
disp
R0
×
×
+
+
+
+
GBR
Rn
+ disp × 1/2/4
+ disp × 1/2/4
+
+
R0
R0
GBR
Rn
Rev. 5.00 Mar. 06, 2009 Page 27 of 770
Calculation
Formula
Byte: Rn + disp
Word: Rn + disp × 2
Longword: Rn +
disp × 4
Rn + R0
Byte: GBR + disp
Word: GBR + disp ×
2
Longword: GBR +
disp × 4
GBR + R0
REJ09B0243-0500