82V3352EDG IDT [Integrated Device Technology], 82V3352EDG Datasheet - Page 97

• Manufacturer Part Number: 82V3352EDG
• Description: SYNCHRONOUS ETHERNET WAN PLL
• Manufacturer: IDT [Integrated Device Technology]

OUT1_INV_CNFG - Output Clock 1 Invert Configuration
OUT2_INV_CNFG - Output Clock 2 Invert Configuration
Programming Information
IDT82V3352
Address:72H
Type: Read / Write
Default Value: XXXXXX0X
Address:73H
Type: Read / Write
Default Value: XXXXX0XX
7 - 2
7 - 3
1 - 0
Bit
Bit
1
0
2
7
7
-
-
OUT1_INV
OUT2_INV
Name
Name
-
-
-
-
6
6
-
-
Reserved.
This bit determines whether the output on OUT1 is inverted.
0: Not inverted. (default)
1: Inverted.
Reserved.
Reserved.
This bit determines whether the output on OUT2 is inverted.
0: Not inverted. (default)
1: Inverted.
Reserved.
5
5
-
-
4
4
-
-
97
3
3
-
-
Description
Description
OUT2_INV
2
2
-
SYNCHRONOUS ETHERNET WAN PLL
OUT1_INV
1
1
-
March 23, 2009
0
0
-
-