82V3352EDG IDT [Integrated Device Technology], 82V3352EDG Datasheet - Page 93

• Manufacturer Part Number: 82V3352EDG
• Description: SYNCHRONOUS ETHERNET WAN PLL
• Manufacturer: IDT [Integrated Device Technology]

CURRENT_DPLL_FREQ[7:0]_STS - DPLL Current Frequency Status 1 *
CURRENT_DPLL_FREQ[15:8]_STS - DPLL Current Frequency Status 2 *
CURRENT_DPLL_FREQ[23:16]_STS - DPLL Current Frequency Status 3 *
Programming Information
IDT82V3352
Address: 62H
Type: Read
Default Value: 00000000
Address: 63H
Type: Read
Default Value: 00000000
Address: 64H
Type: Read
Default Value: 00000000
CURRENT_DP
CURRENT_DP
CURRENT_DP
LL_FREQ15
LL_FREQ23
LL_FREQ7
7 - 0
7 - 0
7 - 0
Bit
Bit
Bit
7
7
7
CURRENT_DPLL_FREQ[23:16]
CURRENT_DPLL_FREQ[15:8] Refer to the description of the CURRENT_DPLL_FREQ[23:16] bits (b7~0, 64H).
CURRENT_DPLL_FREQ[7:0] Refer to the description of the CURRENT_DPLL_FREQ[23:16] bits (b7~0, 64H).
CURRENT_DP
CURRENT_DP
CURRENT_DP
LL_FREQ14
LL_FREQ22
LL_FREQ6
Name
Name
6
6
6
Name
CURRENT_DP
CURRENT_DP
CURRENT_DP
LL_FREQ13
LL_FREQ21
LL_FREQ5
The CURRENT_DPLL_FREQ[23:0] bits represent a 2’s complement signed integer. If the value in these bits is mul-
tiplied by 0.000011, the current frequency offset of the T0 DPLL output in ppm with respect to the master clock will
be gotten.
5
5
5
CURRENT_DP
CURRENT_DP
CURRENT_DP
LL_FREQ12
LL_FREQ20
LL_FREQ4
4
4
4
93
CURRENT_DP
CURRENT_DP
CURRENT_DP
LL_FREQ11
LL_FREQ19
LL_FREQ3
3
3
3
Description
Description
Description
CURRENT_DP
CURRENT_DP
CURRENT_DP
LL_FREQ10
LL_FREQ18
LL_FREQ2
2
2
2
SYNCHRONOUS ETHERNET WAN PLL
CURRENT_DP
CURRENT_DP
CURRENT_DP
LL_FREQ17
LL_FREQ1
LL_FREQ9
1
1
1
CURRENT_DP
CURRENT_DP
CURRENT_DP
March 23, 2009
LL_FREQ16
LL_FREQ0
LL_FREQ8
0
0
0