82V3352EDG IDT [Integrated Device Technology], 82V3352EDG Datasheet - Page 87

• Manufacturer Part Number: 82V3352EDG
• Description: SYNCHRONOUS ETHERNET WAN PLL
• Manufacturer: IDT [Integrated Device Technology]

T0_DPLL_ACQ_BW_DAMPING_CNFG - T0 DPLL Acquisition Bandwidth & Damping Factor Configuration
Programming Information
IDT82V3352
Address: 57H
Type: Read / Write
Default Value: 01101111
T0_DPLL_ACQ
_DAMPING2
7 - 5
4 - 0
Bit
7
T0_DPLL_ACQ_DAMPING[2:0]
T0_DPLL_ACQ_BW[4:0]
T0_DPLL_ACQ
_DAMPING1
6
Name
T0_DPLL_ACQ
_DAMPING0
5
These bits set the acquisition damping factor for T0 DPLL.
000: Reserved.
001: 1.2.
010: 2.5.
011: 5. (default)
100: 10.
101: 20.
110, 111: Reserved.
These bits set the acquisition bandwidth for T0 DPLL.
00XXX: Reserved.
01000: 0.1 Hz.
01001: 0.3 Hz.
01010: 0.6 Hz.
01011: 1.2 Hz.
01100: 2.5 Hz.
01101: 4 Hz.
01110: 8 Hz.
01111: 18 Hz. (default)
10000: 35 Hz.
10001: 70 Hz.
10010: 560 Hz.
10011 ~ 11111: Reserved.
T0_DPLL_ACQ
_BW4
4
87
T0_DPLL_ACQ
_BW3
3
Description
T0_DPLL_ACQ
_BW2
2
SYNCHRONOUS ETHERNET WAN PLL
T0_DPLL_ACQ
_BW1
1
T0_DPLL_ACQ
March 23, 2009
_BW0
0