82V3352EDG IDT [Integrated Device Technology], 82V3352EDG Datasheet - Page 110

• Manufacturer Part Number: 82V3352EDG
• Description: SYNCHRONOUS ETHERNET WAN PLL
• Manufacturer: IDT [Integrated Device Technology]

Table 42: Output Clock Phase Noise
Electrical Specifications
Note:
1. CMAC E2747 TCXO is used.
IDT82V3352
622.08 MHz (T0 DPLL + T0/T4 APLL)
155.52 MHz (T0 DPLL + T0/T4 APLL)
38.88 MHz (T0 DPLL + T0/T4 APLL)
156.25 MHz (T0 DPLL + T4 APLL)
62.5 MHz (T0 DPLL + T4 APLL)
125 MHz (T0 DPLL + T4 APLL)
25 MHz (T0 DPLL + T4 APLL)
16E1 (T0/T4 APLL)
16T1 (T0/T4 APLL)
E3 (T0/T4 APLL)
T3 (T0/T4 APLL)
Output Clock
1
@100Hz Offset
-105
-104
-100
-103
-114
-107
-106
Typ
-70
-82
-92
-93
@1kHz Offset
-100
-102
-121
-117
-116
-110
-117
-119
-115
Typ
-86
-98
110
@10kHz Offset
-107
-116
-103
-100
-118
-110
-118
-120
-115
-117
Typ
-95
@100kHz Offset
-100
-122
-107
-105
-123
-125
-126
-123
-121
-112
-114
Typ
SYNCHRONOUS ETHERNET WAN PLL
@1MHz Offset
-107
-131
-129
-123
-130
-130
-128
-119
-116
-115
-129
Typ
@5MHz Offset
-128
-140
-135
-135
-127
-149
-132
-139
-140
-139
-139
Typ
March 23, 2009
dBC/Hz
dBC/Hz
dBC/Hz
dBC/Hz
dBC/Hz
dBC/Hz
dBC/Hz
dBC/Hz
dBC/Hz
dBC/Hz
dBC/Hz
Unit