R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 961
R5S72611
Manufacturer Part Number
R5S72611
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72611.pdf
(1348 pages)
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20.4.2
Figure 20.7 shows the relationship between the transfer format and each register during the IEBus
data reception.
[In slave reception]
Communications frame
Register
[In master reception]
Communications frame
Register
Reception Format
Note: * Received slave address is compared with IEAR1 and IEAR2. If they match,
the subsequent operations are performed.
Master address
Master address
IEMA1, IEMA2
IEAR1, IEAR2
Figure 20.7 Relationship between Transfer Format
and Each Register during IEBus Data Reception
Slave address
IEAR1, IEAR2
Slave address
IESA1, IESA2
(*)
Section 20 IEBus
Control bits
Control bits
IERCTL
IEMCR
Rev. 2.00 Sep. 07, 2007 Page 929 of 1312
TM
Controller (IEB) [R5S72612] [R5S72613]
Message length bits
Message length bits
IERBFL
IERBFL
REJ09B0320-0200
IERB001 to IERB128
IERB001 to IERB128
Data bits
Data bits
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