R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 1297

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R5S72611

Manufacturer Part Number
R5S72611
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Notes: 1. When writing to the external address space or making SDRAM settings in power-on
Item
External wait setup time
External wait hold time
SDRAS delay time
SDCAS delay time
DQM delay time
CKE delay time
Read
Write
CKIO
A27 to A0
BC3 to BC0
CSn
RD
D31 to D0
WR3 to WR0
D31 to D0
2. The maximum value (f
reset exception handling or cancellation of deep standby mode, be sure to set bits
ACOSW[3:0] in ACSWR to B'0011 beforehand.
cycles and the system configuration of your board.
Figure 31.10 Basic Bus Timing for External Address Space
(Normal Access, Cycle Wait Control, CS Extended Cycle)
t
t
BCD
AD1
Tw1
Symbol
t
t
t
t
t
t
WTS
WTH
RASD
CASD
DQMD
CKED
max
t
t
) of Bφ (external bus clock) depends on the number of wait
WDD1
CSD1
Tw2
Min.
8
5
1
1
1
1
Bφ = 60 MHz*
t
t
RSD
WED1
Tw2
Max.
13
13
13
13
2
Tend (Trd)
Rev. 2.00 Sep. 07, 2007 Page 1265 of 1312
Unit
ns
ns
ns
ns
ns
ns
t
RDS1
Section 31 Electrical Characteristics
t
t
t
WED1
WDH1
RSD
t
RDH1
Tn1
Figure
Figure 31.14
Figure 31.14
Figures 31.15 to 31.21
Figures 31.15 to 31.21
Figures 31.15 to 31.21
Figure 31.21
t
CSD1
REJ09B0320-0200
Ts
t
t
BCD
AD1

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