R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 744
R5S72611
Manufacturer Part Number
R5S72611
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72611.pdf
(1348 pages)
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Section 16 Serial Communication Interface with FIFO (SCIF)
• Transmitting Serial Data (Asynchronous Mode)
Figure 16.4 shows a sample flowchart for serial transmission.
Use the following procedure for serial data transmission after enabling the SCIF for transmission.
Rev. 2.00 Sep. 07, 2007 Page 712 of 1312
REJ09B0320-0200
Write transmit data in SCFTDR,
and read 1 from TDFE flag
Clear TE bit in SCSCR to 0
Read TEND flag in SCFSR
Read TDFE flag in SCFSR
and TEND flag in SCFSR,
Clear SPB2DT to 0 and
Figure 16.4 Sample Flowchart for Transmitting Serial Data
All data transmitted?
Start of transmission
End of transmission
set SPB2IO to 1
Break output?
then clear to 0
TEND = 1?
TDFE = 1?
Yes
Yes
Yes
Yes
No
No
No
No
[1]
[2]
[3]
[1] SCIF status check and transmit data
[2] Serial transmission continuation
[3] Break output during serial
In [1] and [2], it is possible to ascertain
the number of data bytes that can be
written from the number of transmit data
bytes in SCFTDR indicated by the upper
8 bits of SCFDR.
write:
Read SCFSR and check that the
TDFE flag is set to 1, then write
transmit data to SCFTDR, and read 1
from the TDFE and TEND flags, then
clear to 0.
The quantity of transmit data that can
be written is 16 - (transmit trigger set
number).
procedure:
To continue serial transmission, read
1 from the TDFE flag to confirm that
writing is possible, then write data to
SCFTDR, and then clear the TDFE
flag to 0.
transmission:
To output a break in serial
transmission, clear the SPB2DT bit to
0 and set the SPB2IO bit to 1 in
SCSPTR, then clear the TE bit in
SCSCR to 0.
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