R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 1005
R5S72611
Manufacturer Part Number
R5S72611
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72611.pdf
(1348 pages)
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21.3.27 Pre-ECC Correction Subheader: Sub-Mode (Byte 22) Data Register (SHEAD06)
SHEAD06 indicates the sub-mode value in the subheader before ECC correction (byte 22).
21.3.28 Pre-ECC Correction Subheader: Data Type (Byte 23) Data Register (SHEAD07)
SHEAD07 indicates the data type value in the subheader before ECC correction (byte 23).
Bit
7 to 0
Bit
7 to 0
Bit Name
SHEAD06[7:0]
Bit Name
SHEAD07[7:0]
Initial value:
Initial value:
Initial
Value
All 0
Initial
Value
All 0
R/W:
R/W:
Bit:
Bit:
R
R
7
0
7
0
R/W
R
R/W
R
R
R
6
0
6
0
Description
Sub-mode value in the subheader before ECC
For sectors not in Mode 2, this register contains the
Description
Data type value in the subheader before ECC
For sectors not in Mode 2, this register contains the
correction (byte 22)
byte of data at the corresponding position.
correction (byte 23)
byte of data at the corresponding position.
R
R
5
0
5
0
SHEAD06[7:0]
SHEAD07[7:0]
R
R
4
0
4
0
R
R
3
0
3
0
Section 21 CD-ROM Decoder (ROM-DEC)
Rev. 2.00 Sep. 07, 2007 Page 973 of 1312
R
R
2
0
2
0
R
R
1
0
1
0
R
R
0
0
0
0
REJ09B0320-0200
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