R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 401
R5S72611
Manufacturer Part Number
R5S72611
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72611.pdf
(1348 pages)
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11.11
When rotation is selected as the address "indexing" mode, the address is incremented. On
completion of single operand transfer, the value in a working source or working destination
address register for which rotation has been selected returns to the value of the source or
destination address register (DMCSADRn or DMCDADRn) for the corresponding channel.
Figure 11.14 is an example of transfer using the rotate function (source: rotation, destination:
incrementation).
Number of bytes for transfer: 96 bytes
Number of transfers in single operand transfer: 8 bytes
DMA end
Interrupt
request
Data transfer
Current source address
setting value
Rotate Function
Figure 11.14 Example of Transfer Using the Rotate Function
Operand transfer
Source data for transfer
(32 bytes)
8 data
(Source: Rotate, Destination: Increment)
Operand transfer
Current destination
address setting value
Operand transfer
Section 11 Direct Memory Access Controller (DMAC)
Rev. 2.00 Sep. 07, 2007 Page 369 of 1312
(32 bytes)
(32 bytes)
(32 bytes)
Block 1
Block 2
Block 3
8 data
8 data
8 data
Data transferred
in single operand
transfer
Data transferred
in single operand
transfer
Data transferred
in single operand
transfer
REJ09B0320-0200
Total data
transferred
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