R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 465

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

12.3.14 Timer Start Register (TSTR)
TSTR is an 8-bit readable/writable register that selects operation/stoppage of TCNT for channels 0
to 4.
TSTR_5 is an 8-bit readable/writable register that selects operation/stoppage of TCNTU_5,
TCNTV_5, and TCNTW_5 for channel 5.
When setting the operating mode in TMDR or setting the count clock in TCR, first stop the TCNT
counter.
• TSTR
Bit
7
6
5 to 3
Bit Name
CST4
CST3
—
Initial value:
Initial
Value
0
0
All 0
R/W:
Bit:
CST4 CST3
R/W
R/W
R/W
R/W
R
7
0
R/W
6
0
Description
Counter Start 4 and 3
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but
the TIOC pin output compare output level is retained. If
TIOR is written to when the CST bit is cleared to 0, the
pin output level will be changed to the set initial output
value.
0: TCNT_4 and TCNT_3 count operation is stopped
1: TCNT_4 and TCNT_3 performs count operation
Reserved
These bits are always read as 0. The write value should
always be 0.
—
R
5
0
—
R
4
0
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
—
R
3
0
CST2 CST1 CST0
Rev. 2.00 Sep. 07, 2007 Page 433 of 1312
R/W
2
0
R/W
1
0
R/W
0
0
REJ09B0320-0200