R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 724

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 16 Serial Communication Interface with FIFO (SCIF)
16.3.8
SCBRR is an 8-bit register that, together with the baud rate generator clock source selected by the
CKS1 and CKS0 bits in the serial mode register (SCSMR), determines the serial transmit/receive
bit rate.
The CPU can always read and write to SCBRR. SCBRR is initialized to H'FF by a power-on reset
or in deep standby mode. Each channel has independent baud rate generator control, so different
values can be set in eight channels.
The SCBRR setting is calculated as follows:
• Asynchronous mode:
• Clocked synchronous mode:
B:
N:
Pφ:
n:
Rev. 2.00 Sep. 07, 2007 Page 692 of 1312
REJ09B0320-0200
Bit rate (bits/s)
SCBRR setting for baud rate generator (0 ≤ N ≤ 255)
(The setting must satisfy the electrical characteristics.)
Operating frequency for peripheral modules (MHz)
Baud rate generator clock source (n = 0, 1, 2, 3) (for the clock sources and values of n,
see table 16.3.)
N =
N =
Bit Rate Register (SCBRR)
8 × 2
64 × 2
Pφ
Pφ
2n-1
2n-1
× B
Initial value:
× B
× 10
R/W:
× 10
Bit:
6
R/W
6
− 1
7
1
− 1
R/W
6
1
R/W
5
1
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
R/W
0
1