R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 1030

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 21 CD-ROM Decoder (ROM-DEC)
(3)
In interpolated sync mode, synchronization is always driven by the internal counter after a sync
code pattern has been detected at the start of decoding. Accordingly, this mode is effective when
the sync patterns have been damaged.
However, decoding becomes incorrect after a change to the synchronization timing, since the
change in timing is not followed.
Figure 21.12 shows the operation in interpolated sync mode.
(4)
In interpolated sync plus external sync mode, synchronization is based on the detected sync code
patterns as long as they are present, and if a sync pattern is not detected at the 2352nd byte, the
sync code maintenance is applied. Synchronization in this mode is more quickly responsive to
changes in synchronization timing than synchronization in the automatic sync maintenance mode.
However, decoding still becomes incorrect when a sync pattern is input with abnormal timing.
Rev. 2.00 Sep. 07, 2007 Page 998 of 1312
REJ09B0320-0200
Output data
Sync code
detection
Intput data
Interpolated Sync Mode
Interpolated Sync Plus External Sync Mode
Sector 1
Figure 21.12 Operation in Interpolated Sync Mode
Sector 1
Abnormal sector
Maintain Ignore
Abnormal
sector
Maintain
Sector 3
Abnormal
sector
Ignore
Maintain
Sector 4
Abnormal
sector
Ignore
Maintain
Sector 5
Abnormal
sector