R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 826

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 18 Serial Sound Interface (SSI)
(7)
Several more configuration bits in non-compressed mode are shown below. These bits are not
mutually exclusive, but some combinations may not be useful for any other device.
These configuration bits are described below with reference to figure 18.10, Basic Sample Format.
Rev. 2.00 Sep. 07, 2007 Page 794 of 1312
REJ09B0320-0200
SWL = 6 bits (not attainable in SSI module, demonstration only)
DWL = 4 bits (not attainable in SSI module, demonstration only)
CHNL = 00, SCKP = 0, SWSP = 0, SPDP = 0, SDTA = 0, PDTA = 0, DEL = 0, MUEN = 0
4-bit data samples continuously written to SSITDR are transmitted onto the serial audio bus.
SSISCK
SSIWS
SSIDATA
SCKP = 0, SWSP = 0, DEL = 1, CHNL = 11, SPDP = 0, SDTA = 1
System word length = data word length × 4
SSISCK
SSIWS
SSIDATA
Bit Setting Configuration Format
Figure 18.9 Multichannel Format (4 Channels; Transmitting and Receiving in
Key for this and following diagrams:
TD28
TDn
0
1
(Transmit Mode with Example System/Data Word Length)
MSB
the order of Padding Bits and Serial Data; with Padding)
word 1
0
Data
Arrow head indicates sampling point of receiver
Bit n in SSITDR
means a low level on the serial bus (padding or mute)
means a high level on the serial bus (padding)
LSB
0
MSB
TD31 TD30 TD29 TD28
word 2
System word 1
Data
Figure 18.10 Basic Sample Format
1st channel
LSB MSB
word 3
Data
LSB MSB
word 4
Data
LSB
0
0
MSB
word 5
Data
TD31 TD30 TD29 TD28
LSB MSB
2nd channel
word 6
Data
System word 2
LSB MSB
word 7
Data
LSB MSB
0
word 8
Data
0
LSB
TD31