R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 957
R5S72611
Manufacturer Part Number
R5S72611
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72611.pdf
(1348 pages)
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Notes: 1. Do not change the setting of CKS3 to CKS0 while IEBus is in transmit/receive operation
Bit
7 to 5
4
3
2 to 0
2. After the MSTP4 bit in STBCR2 is cleared to 0 to start the operation of the IEB with the
Bit Name
CKS3
CKS[2:0]
CKS3 bit set to 1 (the AUDIO_X1 and AUDIO_X2 clocks are used), do not set the
MSTP4 bit to 1 (clock supply to the IEB except IECKSR is stopped). As for the setting
of the STBCR2 register, see section 27, Power-Down Modes.
Initial
Value
All 0
0
0
000
R/W
R
R/W
R
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Input Clock Selection 3*
Specifies the clock the IEB uses
0: Peripheral clock (Pφ)
1: AUDIO_X1, AUDIO_X2
Reserved
This bit is always read as 0. The write value should
always be 0.
Input Clock Selection 2 to 0*
Specifies the division ratio for the clock IEB uses
000: IEB uses the clock of IEBφ specified by CKS3
001: IEB uses the 1/2 divided clock of IEBφ specified by
010: IEB uses the 1/3 divided clock of IEBφ specified by
011: IEB uses the 1/4 divided clock of IEBφ specified by
100: IEB uses the 1/5 divided clock of IEBφ specified by
101: IEB uses the 1/6 divided clock of IEBφ specified by
110: Setting prohibited
111: Setting prohibited
Section 20 IEBus
(IEBφ = 6 MHz, 6.29 MHz)
CKS3 (IEBφ = 12 MHz, 12.58 MHz)
CKS3 (IEBφ = 18 MHz, 18.87 MHz)
CKS3 (IEBφ = 24 MHz, 25.16 MHz)
CKS3 (IEBφ = 30 MHz, 31.45 MHz)
CKS3 (IEBφ = 36 MHz, 37.74 MHz)
Rev. 2.00 Sep. 07, 2007 Page 925 of 1312
TM
Controller (IEB) [R5S72612] [R5S72613]
1
*
2
1
REJ09B0320-0200
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