R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 122

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 4 Clock Pulse Generator (CPG)
4.4.2
CKIOCR is an 8-bit readable/writable register used to control output of the CKIO pin. When this
LSI is started in clock operating mode 3, writing 1 to this register is invalid.
When this LSI is started in clock operating mode 3, CKIOCR is initialized to H'00 by a power-on
reset caused by the RES pin or in deep standby mode. When this LSI is started in clock operating
mode 0 or 2, CKIOCR is initialized to H'01 by a power-on reset caused by the RES pin or in deep
standby mode. This register is not initialized by an internal reset triggered by an overflow of the
WDT, a manual reset, in sleep mode, or in software standby mode.
Note:
Rev. 2.00 Sep. 07, 2007 Page 90 of 1312
REJ09B0320-0200
Bit
7 to 1
0
*
CKIO Control Register (CKIOCR)
Bit Name

CKIOOE
The initial value depends on the clock operating mode of the LSI.
Initial value:
Initial
Value
All 0
0/1*
R/W:
Bit:
—
R
7
0
R/W
R
R/W
—
R
6
0
—
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
CKIO Output Enable
Enables output of the CKIO pin.
0: Output from CKIO is not enabled.
1: Output from CKIO is enabled.
R
5
0
—
R
4
0
—
R
3
0
—
R
2
0
—
R
1
0
CKIO
R/W
OE
0/1*
0