R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 941
R5S72611
Manufacturer Part Number
R5S72611
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72611.pdf
(1348 pages)
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20.3.14 IEBus Lock Address Register 2 (IELA2)
IELA2 specifies the upper four bits of a locked address when a unit is locked.
IELA2 is initialized by a power-on reset or in deep standby.
Bit
7 to 4
3 to 0
Bit Name
ILAU4
Initial value:
Initial
Value
All 0
0000
R/W:
Bit:
—
R
R/W
R
R
7
0
—
R
6
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Upper Four Bits of IEBus Locked Address
Stores the upper four bits of the master unit address
when a unit is locked. These bits are valid only when
the LCK bit in IEFLG is set
Section 20 IEBus
—
R
5
0
—
R
4
0
R
3
0
Rev. 2.00 Sep. 07, 2007 Page 909 of 1312
TM
R
2
0
ILAU4
Controller (IEB) [R5S72612] [R5S72613]
R
1
0
R
0
0
REJ09B0320-0200
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