PM7311 pmc-sierra, PM7311 Datasheet - Page 63

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
10.3 Packet Walkthrough
10.3.1
Ingress Path
Figure 14 shows the elements and data transformations that occur as data traverses the FREEDM
84A1024L from the SBI to the Any-PHY interface.
Figure 14 Ingress Data Flow
Data arriving via the SBI interface is extracted from the SBI format and associated with an HDLC
channel. In addition to the SBI bus, 3 clock and data interfaces are also supported simultaneously.
Each link is independent and has its own associated clock. For each link, a serial to parallel
conversion forms the data bytes. The data bytes are multiplexed, in byte serial format, for
delivery to the HDLC/Partial Packet Processor block
The HDLC engine receives the incoming byte stream and examines the byte stream to delineate
the opening and closing of the HDLC packet. Bit de-stuffing is performed, FCS checking and
minimum/maximum packet size checking is performed. The HDLC engine is capable of
simultaneously processing 1024 independent HDLC channels. The resulting HDLC data and
status information is passed to the Partial Packet Processor to be stored in the appropriate HDLC
channel FIFO buffer.
The Partial Packet Processor controls a 64 Kbyte partial packet RAM. Data is written into the
RAM at a location that is associated with the HDLC channel. As more data arrives for a given
HDLC channel, it is stored with the previous bytes of data for a given HDLC channel forming a
chunk of data. Packets are not intermingled within chunks. Completed chunks are passed to the
fragment builder.
Bitstreams per link
Bytes per HDLC Channel
EXSBI336
Block per HDLC Channel
Channel
-izer
HDLC
HDLC Channel (fragment)
Linked list of Chunks per
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Partial
Packet
Processor
BUILDER
Cache
RFRAG
Lookup
DLCI
Placed in re-sequencing
Order
RE-SEQ
Linked list of Chunks
Builder
Frame
MANAGER
INGRESS
Q
Priority queues (2)
ANY
PHY
I/F
Released
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