PM7311 pmc-sierra, PM7311 Datasheet - Page 22

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
2.5
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Statistics
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Fault Isolation Features
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Technologies
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FREEDM 84A1024L maintains the following counters on a per-HDLC channel basis:
o CRC Errors observed by the HDLC framer.
o HDLC framing aborts.
o Non-Octet aligned frames.
o HDLC MRU exceeded.
o Bytes and datagrams received.
o Bytes and datagrams transmitted.
Additionally, the FREEDM 84A1024L provides the following counters per Ingress CI:
o Number of Lost Sequence Number events.
o Number of Unexpected Sequence Number events.
o Number of Frame Relay datagrams received with DE bit set.
Additionally, the FREEDM 84A1024L provides the following global error counters:
o Number of bytes discarded due to transmit overflows, receive overflows in the presence
o Number of Lost fragment events
o FIFO overflows and underruns.
o Additional error states are also tracked.
Additionally, FREEDM 84A1024L supports the MFR MIB by detecting and informing the
host of unexpected sequence numbers and time outs.
Three levels of loop-back are provided:
o Three Clock and Data line loop-backs
o SBI tributary loopback
o System side loop-back per HDLC channel.
520 pin (1.27 mil pitch) thermally enhanced ball grid array (TEBGA) package.
343 signal pins, 3.3V I/O.
Low power 0.18mm CMOS technology using 1.8V core power.
of link failures, and line rate arrivals of small (< 40 byte) packets.
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Released
22