PM7311 pmc-sierra, PM7311 Datasheet - Page 109

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
Register 0x00C: Master Clock / Frame Pulse Activity Monitor
This register provides activity monitoring on the FREEDM 84A1024L clock and SBI frame pulse
inputs. When a monitored input makes a transition, the corresponding register bit is set high.
The bit will remain high until this register is read, at which point, all the bits in this register are
cleared. The corresponding register bit reading low indicates a lack of transitions. This register
should be read periodically to detect stuck at conditions.
SYSCLKA
The system clock active bit (SYSCLKA) monitors for low to high transitions on the
SYSCLK input. SYSCLKA is set high on a rising edge of SYSCLK, and is set low when this
register is read.
Bit
Bit 31
to
Bit 27
Bit 26
Bit 25
To
Bit 23
Bit 22
Bit 21
To
Bit 19
Bit 18
Bit 17
To
Bit 15
Bit 14
Bit 13
to
Bit 11
Bit 10
Bit 9
to
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R
R
R
R
R
R
R
R
R
R
R
R
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Function
Unused
RCLKA[8]
Unused
RCLKA[4]
Unused
RCLKA[0]
Unused
TCLKA[8]
Unused
TCLKA[4]
Unused
TCLKA[0]
TXCLKA
RXCLKA
DC1FPA
AC1FPA
REFCLKA
SYSCLKA
Default
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Released
109