PM7311 pmc-sierra, PM7311 Datasheet - Page 264

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
14.2 SBI Add Bus Interface Timing
14.3 Receive Link Timing
Figure 39 DS3 Add Bus Adjustment Request Functional Timing
Figure 39 illustrates the operation of the SBI ADD BUS, using positive and negative justification
requests as an example. (The responses to the justification requests would take effect during the
next multi-frame.) The negative justification request occurs on the DS-3#3 tributary when
AJUST_REQ is asserted high during the H3 octet. The positive justification occurs on the DS-
3#2 tributary when AJUST_REQ is asserted high during the first DS-3#2 octet after the H3 octet.
The AACTIVE signal is shown for the case in which FREEDM 84A1024L is only driving DS-
3#2 onto the SBI ADD bus.
The timing relationship of the receive clock (RCLK[n]) and data (RD[n]) signals is shown in
Figure 40. The receive data is viewed as a contiguous serial stream. There is no concept of time-
slots or framing. Every eight bits are grouped together into a byte with arbitrary alignment. The
first bit received (B1 in Figure 40) is deemed the most significant bit of an octet. The last bit
received (B8) is deemed the least significant bit. Bits that are to be processed by the FREEDM
84A1024L are clocked in on the rising edge of RCLK[n]. Bits that should be ignored (X in
Figure 40) are squelched by holding RCLK[n] quiescent. In Figure 40, the quiescent period is
shown to be a low level on RCLK[n]. A high level, effected by extending the high phase of the
previous valid bit, is also acceptable. Selection of bits for processing is arbitrary and is not
subject to any byte alignment or frame boundary considerations.
Figure 40 Receive Link Timing
AJUST_REQ
ADATA[7:0]
AACTIVE
REFCLK
C1FP
ADP
APL
AV5
C1
RCLK[n]
RD[n]
···
···
···
···
···
···
···
···
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
B1 B2 B3 B4 X B5 X X X B6 B7 B8 B1 X
H3
H3
H3
DS-3 #1 DS-3 #2 DS-3 #3DS-3 #1
Released
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