PM7311 pmc-sierra, PM7311 Datasheet - Page 136

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
Reserved
STRIP
PROV
The Reserved bit must be set to 1 for correct operation of the FREEDM 84A1024L device.
The indirect frame check sequence discard bit (STRIP) configures the HDLC processor to
remove the CRC from the incoming frame when writing the data to the channel FIFO. The
FCS discard bit to be written to the channel provision RAM, in an indirect channel write
operation, must be set up in this register before triggering the write. When STRIP is set high
and CRC[1:0] is not equal to “00”, the received CRC value is not written to the FIFO. When
STRIP is set low, the received CRC value is written to the FIFO. The bytes in buffer field of
the RPD correctly reflect the presence/absence of CRC bytes in the buffer. STRIP reflects the
value written until the completion of a subsequent indirect channel read operation.
The indirect provision enable bit (PROV) reports the channel provision enable flag read from
the channel provision RAM after an indirect channel read operation has completed. The
provision enable flag to be written to the channel provision RAM, in an indirect write
operation, must be set up in this register before triggering the write. When PROV is set high,
the HDLC processor will process data on the channel specified by CHAN[9:0]. When PROV
is set low, the HDLC processor will ignore data on the channel specified by CHAN[9:0].
PROV reflects the value written until the completion of a subsequent indirect channel read
operation.
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Released
136