PM7311 pmc-sierra, PM7311 Datasheet - Page 286

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
19.3
Symbol
TPOUTEN
TZOUTEN
No t es:
1.
2.
3.
Table 60 Clock/Data Input (Figure 66)
Symbol
tS
tH
Figure 66 Receive Data Timing
Table 61 Clock/Data Output (Figure 67)
Symbol
t P
t P
Notes:
·
Serial Clock and Data Timing
RD
TD
TDLOOP
RD
Although the AJUST_REQ is referenced to the Drop bus DC1FP alignment the timing from REFCLK is
independent of the Add or Drop side of the SBI336 bus.
Maximum output propagation delays are measured with a 50pF load on the outputs except C1FPOUT,
which is measured with a 100pF load.
This number is only relevant when the DEFAULT_DRV register bit in SBI ADD BUS Master
Configuration register is low indicating the bus is not always driven.
Maximum output propagation delays are measured with a 50pF load on the output.
Parameter
ADETECT[1] and ADETECT[0] low to All SBI ADD
BUS Outputs (except AACTIVE) Valid
ADETECT[1] or ADETECT[0] high to All SBI ADD BUS
Outputs (except AACTIVE) Tristate
Description
TCLK[8,4,0] Frequency
TCLK[8,4,0] Duty Cycle
TCLK[8,4,0] Low to TD[8,4,0] Valid (normal operation)
RCLK[8,4,0] Low to TD[8,4,0] Valid (line loopback)
Description
RCLK[8,4,0] Frequency
RCLK[8,4,0] Duty Cycle
RD[8,4,0] Set-Up Time
RD[8,4,0] Hold Time
RCLK[n]
RD[n]
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
tS
RD
tH
RD
Min
40
3
3
Min
2
2
Min
40
2
1.5
Max
13
13
Max
52
60
12
12.5
Max
52
60
Units
ns
ns
Released
Units
MHz
%
ns
ns
Units
MHz
%
ns
ns
286