PM7311 pmc-sierra, PM7311 Datasheet - Page 106

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
CFOVRI
TXCHQOVRI
SBIPAR
DLLI
IFPPEI
EFPPEI
RSFPPEI
The Circular FIFO Overflow interrupt status bit reports TAPI Circular FIFO overflow error
interrupts to the microprocessor. CFOVRI is set high upon attempts to write to the circular
FIFO when it is already full. CFOVRI remains valid when interrupts are disabled and may be
polled to detect Circular FIFO Overflow events. (NOTE – Circular FIFO overflows will not
occur if the TRDY is observed or specified minimum spacing between small packets is
adhered.)
The Transmit Channel Queue Overflow interrupt status bit reports EQM-12 Channel Queue
overflow error interrupts to the microprocessor. TXCHQOVRI is set high upon attempts to
write to the Queue when it is already full. TXCHQOVRI remains valid when interrupts are
disabled and may be polled to detect Queue Overflow events. (NOTE – Queue overflows will
not occur if Channel availability polling is observed and adhered.)
The SBI Parity interrupt status bit (SBIPARI) reports a parity on the SBI bus. SBIPARI
remains valid when interrupts are disabled and may be polled to detect SBI Parity error
conditions.
The delay line error event interrupt status bit (DLLI) indicates the DLL ERROR register bit
has gone high. When the DLL ERROR register changes from a logic zero to a logic one, the
DLLI register bit is set to logic one. DLLI remains valid when interrupts are disabled and
may be polled to detect DLL error events.
The Ingress FPP Empty interrupt status bit (IFPPEI) indicates that the Ingress FPP FIFO is
empty. IFPPEI is set high upon detection of such this condition. IFPPEI remains valid when
interrupts are disabled and may be polled.
The Egress FPP Empty interrupt status bit (EFPPEI) indicates that the Egress FPP FIFO is
empty. EFPPEI is set high upon detection of such a condition. EFPPEI remains valid when
interrupts are disabled and may be polled.
The Re-sequencing FPP Empty interrupt status bit (RSFPPEI) indicates that the Re-
sequencing Memories FPP FIFO is empty. RSFPPEI is set high upon detection of such a
condition. RSFPPEI remains valid when interrupts are disabled and may be polled.
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Released
106