PM7311 pmc-sierra, PM7311 Datasheet - Page 20

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
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PPP Features
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Supports 3 individual clock and data interfaces that can individually operate at up to 52 MHz.
The device can be configured to process data from either the clock and data interfaces or
from the SBI on a per clock-data-link/SPE basis.
In a channelized application, the number of time-slots assigned to an HDLC channel is
programmable from 1 to 24 (for T1/J1) and from 1 to 31 (for E1).
For each channel, the HDLC receiver supports programmable flag sequence detection, bit de-
stuffing and frame check sequence validation. The receiver supports the validation of both
CRC-CCITT and CRC-32 frame check sequences.
For each HDLC channel, the receiver checks for packet abort sequences, octet alignment and
for minimum and maximum packet length.
For each HDLC channel, time-slots are selectable to be in 56 Kbps format or 64 Kbps clear
channel format.
For each HDLC channel, the HDLC transmitter supports programmable flag sequence
generation, bit stuffing and frame check sequence generation. The transmitter supports the
generation of both CRC-CCITT and CRC-32 frame check sequences. The transmitter also
aborts packets under the direction of the external TM engine or automatically when the
channel underflows.
Support for 2 levels of transmit priority per HDLC channel. (Only single link channels
support this feature, not multi-link bundles.) High and low priority packets are queued
separately. High priority traffic, when present, is always transmitted before low priority
traffic. When low priority traffic is fragmented, high priority traffic is inserted in between
low priority fragments.
Link Control Protocol packet identification. Packets are identified by the PID as control
protocols and will be forwarded to the Any-PHY interface.
Capable of supporting line rate transfers of packet sizes from 40 to 9.6K bytes.
Support for PPP header compression as per RFC 1661 on sequenced links. On receive,
compressed headers are detected and processed appropriately as they arrive on an HDLC
channel. Compressed PPP headers are passed to the system side via the Any-PHY interface.
On transmit, compressed headers are accepted from the system side device via the Any-PHY
interface. On sequenced links, all required processing is provided to correctly insert the
compressed PPP headers into the 1024 HDLC channels. On non-sequenced links, header
compression is only supported through the use of transparent mode.
RFC-1990 Multi-link PPP bundles:
o Capable of supporting fragment sizes from 6 to 9.6K bytes with the restriction that the
o Support for 3 egress fragmentation sizes (128, 256, and 512 bytes) configurable per
o Either 12 bit or 24 bit sequence number, with short and long fragment header formats, is
maximum number of fragments per packet is 81.
connection. Optionally, full packet transfers are supported on a per connection basis. The
FREEDM 84A1024L supports header compression but does not perform it.
supported.
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Released
20