PM7311 pmc-sierra, PM7311 Datasheet - Page 104

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
Register 0x008: Master High Priority Interrupt Status
This register reports the high priority interrupt status for various events detected or initiated by
the FREEDM 84A1024L. Reading this register acknowledges and clears the interrupts. The
register is also writeable to allow s/w testing of interrupt generation and service routines.
RFOVRI
The receive Partial Packet FIFO overrun error interrupt status bit reports receive Partial
Packet FIFO overrun error interrupts to the microprocessor. RFOVRI is set high on attempts
to write data into the logical FIFO of a channel when it is already full. RFOVRI remains
valid when interrupts are disabled and may be polled to detect receive FIFO overrun events.
Bit
Bit 31
To
Bit 22
Bit 21
Bit 20
Bit 19
Bit 18
Bit 17
Bit 16
Bit 15
Bit 14
Bit13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Function
Unused
CBLTEXI
SBIC1FPSI
SDGMDI
CBAEXI
Reserved
RST_DONEI
UNSUPHFI
BADSIZEI
RSFPPEI
EFPPEI
IFPPEI
DLLI
SBIPARI
TXCHQOVRI
CFOVRI
TPRTYI
TFOVRI
TFUDRI
SRAMPI
UECCRSI
UECCCBI
RFOVRI
Default
X
0
X
0
0
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Released
104