PM7311 pmc-sierra, PM7311 Datasheet - Page 112

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
Register 0x018: Master Low Priority Interrupt Enable
This register provides low priority interrupt enables for various events detected or initiated by the
FREEDM 84A1024L. Each low priority interrupt enable bit corresponds to the equivalent bit in
the Master Low Priority Interrupt Status register. All interrupt enable bits are active high. When
high, interrupts are enabled. When low, interrupts are masked. While interrupts are masked the
status bit in the status register may still be polled to detect the error event. Enabled low priority
interrupts cause the INTLOB interrupt pin to be asserted.
Bit
Bit 31
To
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Function
Unused
Reserved
UPSNEE
AUTODRE
UNTSXE
TUNPVE
CECCRSE
CECCCBE
RPFEE
RABRTE
RFCSEE
MPISTATE
ENFEE
USNEE
LSNEE
Default
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Released
112