PM7311 pmc-sierra, PM7311 Datasheet - Page 271

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
14.7 Receive APPI Timing (Any-PHY Level 3)
the TFRAG Any-PHY Channel RAM. The user may configure TPA_HI/ TPA_LO to report
whether or not space exists in the Any-PHY channel FIFO to accept a further MTU-sized packet.
Alternatively, TPA_HI/TPA_LO may be configured to report whether the FIFO fill level is above
or below a user-defined threshold.
The receive Any-PHY packet interface (APPI) timing is shown in Figure 49 when the Any-PHY
interface operates at 104 MHz, RXDATA[7:0] are valid. The FREEDM 84A1024L device
provides data to an external controller using the receive APPI.
Figure 49 Receive APPI Timing (Normal Transfer 8 bit 104 MHz)
Figure 49 shows the transfer of an 8 byte packet across the Rx APPI from FREEDM 84A1024L.
The external controller sets RENB low to commence data transfer across the Rx APPI. The
FREEDM 84A1024L samples RENB low and responds by asserting RSX one RXCLK cycle
later. The start of all burst data transfers is qualified with RSX and an in-band Any-PHY channel
address on RXDATA[7:0] to associate the data to follow with an Any-PHY channel. The RSOP
signal is asserted 2 cycles after the RSX allowing the controller to identify the start of packet. The
first two bytes indicate the Any-PHY channel (CH 2) while the next two bytes contain either a
connection identifier or the first two bytes of the packet.
During the cycle when D2 is placed on RXDATA[7:0], the external controller is unable to accept
any further data and sets RENB high. Two RXCLK cycles later, the FREEDM 84A1024L pauses
the Rx APPI. The external controller may hold RENB high for an indeterminate number of
RXCLK cycles. The FREEDM 84A1024L will wait until the external controller returns RENB
low.
The FREEDM 84A1024L will not pause burst data transfers across the Rx APPI.
The RVAL and REOP signals indicate the presence and end of valid packet data respectively. The
RERR and RMOD signals are only valid at the end of a packet and are qualified with the REOP
signal. When a packet is erred, the FREEDM 84A1024L may be programmed to overwrite
RXDATA[7:0] in the final word of packet transfer with status information indicating the cause of
the error. RXDATA[7:0] is not modified if a packet is error free
RXDATA[7:0]
RXPRTY
RXCLK
RERR
RVAL
RSOP
RENB
REOP
RSX
CH 2 CH 2
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
D1
D2
D3
D4
D5
D6
D7
Released
271