PM7311 pmc-sierra, PM7311 Datasheet - Page 123

• Manufacturer Part Number: PM7311
• Description: Freedm 84a1024l Assp Telecom Standard Datasheet
• Manufacturer: pmc-sierra

Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021832, Issue 2
Register 0x074: DLL Control Status
The DLL Control Status Register provides information of the DLL operation.
RUN
CHANGE
ERROR
The DLL lock status register bit (RUN) indicates the DLL found a delay line tap in which the
phase difference between the rising edge of DLLREFCLK and the rising edge of SYSLCK is
zero. After system reset, RUN is logic zero until the phase detector indicates an initial lock
condition. When the phase detector indicates lock, RUN is set to logic 1.
The RUN register bit is cleared only by a hardware or a software reset. RUN is forced high
when the VERN_EN register is set high.
The delay line tap change register bit (CHANGE) indicates the DLL has moved to a new
delay line tap. CHANGE is set high for eight DLLSYSCLK cycles when the DLL moves to
a new delay line tap.
The delay line error register bit (ERROR) indicates the DLL has run out of dynamic range.
When the DLL attempts to move beyond the end of the delay line, ERROR is set high. When
ERROR is high, the DLL cannot generate a DLLDCLKO phase, which causes the rising edge
of DLLREFCLK to be aligned to the rising edge of DLLSYSCLK. ERROR is set low, when
the DLL captures lock again.
ERROR is forced low when the VERN_EN register is set high.
Bit
Bit 31
To
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R
R
R
R
R
R
R
FREEDM 84A1024L ASSP Telecom Standard Product Data Sheet
Function
Unused
DLLSYSCLKI
DLLREFCLKI
ERRORI
CHANGEI
Unused
ERROR
CHANGE
RUN
Default
X
X
X
X
X
X
X
X
X
Released
123