SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 846
SAM9RL64
Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9RL64
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 846 of 903
- Download datasheet (13Mb)
43.10.8
Register Name:
Access Type:
• EOCx: End of Conversion x
0 = Corresponding analog channel is disabled, or the conversion is not finished.
1 = Corresponding analog channel is enabled and conversion is complete.
• OVREx: Overrun Error x
0 = No overrun error on the corresponding channel since the last read of TSADCC_SR.
1 = There has been an overrun error on the corresponding channel since the last read of TSADCC_SR.
• DRDY: Data Ready
0 = No data has been converted since the last read of TSADCC_LCDR.
1 = At least one data has been converted and is available in TSADCC_LCDR.
• GOVRE: General Overrun Error
0 = No General Overrun Error occurred since the last read of TSADCC_SR.
1 = At least one General Overrun Error has occurred since the last read of TSADCC_SR.
• ENDRX: End of RX Buffer
0 = The Receive Counter Register has not reached 0 since the last write in TSADCC_RCR or TSADCC_RNCR.
1 = The Receive Counter Register has reached 0 since the last write in TSADCC_RCR or TSADCC_RNCR.
• RXBUFF: RX Buffer Full
0 = TSADCC_RCR or TSADCC_RNCR have a value other than 0.
1 = Both TSADCC_RCR and TSADCC_RNCR have a value of 0.
• PENCNT: Pen Contact
0 = No contact has been detected since the last read of TSADCC_SR or PENDET is at 0.
1 = At least one contact has been detected since the last read of TSADCC_SR.
• NOCNT: No Contact
0 = No contact loss has been detected since the last read of TSADCC_SR or PENDET is at 0.
1 = At least one contact loss has been detected since the last read of TSADCC_SR.
6289D–ATARM–3-Oct-11
31
23
15
–
–
–
7
–
TSADCC Status Register
30
22
14
TSADCC_SR
Read-only
–
–
–
6
–
NOCNT
OVRE5
EOC5
29
21
13
–
5
PENCNT
OVRE4
EOC4
28
20
12
–
4
RXBUFF
OVRE3
EOC3
27
19
11
–
3
ENDRX
OVRE2
EOC2
AT91SAM9R64/RL64
26
18
10
–
2
GOVRE
OVRE1
EOC1
25
17
–
9
1
OVRE0
DRDY
EOC0
24
16
–
8
0
846
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