SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 752
SAM9RL64
Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9RL64
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 752 of 903
- Download datasheet (13Mb)
41.4.8.14
752
AT91SAM9R64/RL64
Isochronous Endpoint Handling: OUT Example
Example:
The user can ascertain the bank status (free or busy), and the toggle sequencing of the data
packet for each bank with the UDPHS_EPTSTAx register in the three bit fields as follows:
This is particularly useful in case of a missing data packet.
If the inter-packet delay between the OUT token and the Data is greater than the USB standard,
then the ISO-OUT transaction is ignored. (Payload data is not written, no interrupt is generated
to the CPU.)
If there is a data CRC (Cyclic Redundancy Check) error, the payload is, none the less, written in
the endpoint. The ERR_CRISO flag is set in UDPHS_EPTSTAx register.
If the endpoint is already full, the packet is not written in the DPRAM. The ERR_FL_ISO flag is
set in UDPHS_EPTSTAx.
If the payload data is greater than the maximum size of the endpoint, then the ERR_OVFLW flag
is set. It is the task of the CPU to manage this error. The data packet is written in the endpoint
(except the extra data).
If the host sends a Zero Length Packet, and the endpoint is free, no data is written in the end-
point, the RX_BK_RDY flag is set, and the BYTE_COUNT field in UDPHS_EPTSTAx register is
null.
The FRCESTALL command bit is unused for an isochronous endpoint.
Otherwise, payload data is written in the endpoint, the RX_BK_RDY interrupt is generated and
the BYTE_COUNT in UDPHS_EPTSTAx register is updated.
• If NB_TRANS = 3, the sequence should be either
• If NB_TRANS = 2, the sequence should be either
• If NB_TRANS = 1, the sequence should be
• TOGGLESQ_STA: PID of the data stored in the current bank
• CURRENT_BANK: Number of the bank currently being accessed by the microcontroller.
• BUSY_BANK_STA: Number of busy bank
– MData0
– MData0/Data1
– MData0/Data1/Data2
– MData0
– MData0/Data1
– Data0
6289D–ATARM–3-Oct-11
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