SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 727

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

40.7.11
Register Name:
Access Type:
40.7.12
Register Name:
Access Type:
• CEM: Channel x Endian Mode
0: Transferring data through Channel x is straightforward (Little-endian).
1: Transferring data through Channel x from/to a memory is performed with from/to Big-endian format translation.
• SIZE: Channel x Data Size
SIZE Encoding
Note:
• CEN: Channel x Enable
0: Data transfer is disabled on Channel x.
1: Data transfer is enabled on Channel x.
6289D–ATARM–3-Oct-11
RXBUFF
31
23
15
31
23
15
–
–
7
–
–
–
–
7
–
Each time slot in the data phase is 20 bits long. For example, if a 16-bit sample stream is being played to an AC97 DAC, the first
16 bit positions are presented to the DAC MSB-justified. They are followed by the next four bit positions that the AC’97 Controller
fills with zeroes. This process ensures that the least significant bits do not introduce any DC biasing, regardless of the imple-
mented DAC’s resolution (16-, 18-, or 20-bit).
SIZE
AC’97 Controller Channel A Mode Register
AC’97 Controller Channel B Mode Register
0x0
0x1
0x2
0x3
ENDRX
PDCEN
30
22
14
30
22
14
AC97C_CAMR
Read/Write
–
6
–
AC97C_CBMR
Read/Write
–
–
–
6
–
Selected Channel
20 bits
18bits
16 bits
10 bits
OVRUN
OVRUN
CEN
CEN
29
21
13
29
21
13
–
–
5
–
–
5
RXRDY
RXRDY
28
20
12
28
20
12
–
–
–
4
–
–
–
4
TXBUFE
27
19
11
27
19
11
–
–
–
3
–
–
–
3
–
UNRUN
UNRUN
ENDTX
CEM
CEM
AT91SAM9R64/RL64
26
18
10
26
18
10
–
2
–
–
2
TXEMPTY
TXEMPTY
25
17
25
17
–
9
–
1
–
9
–
1
SIZE
SIZE
TXRDY
TXRDY
24
16
24
16
–
8
–
0
–
8
–
0
727