SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 726

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

• UNRUN: Transmit Underrun
Active only when Variable Rate Mode is enabled (VRA bit set in the AC97C_MR register). Automatically cleared by a pro-
cessor read operation.
0: No data has been requested from the channel since the last read of the Status Register, or data has been available each
time the CODEC requested new data from the channel since the last read of the Status Register.
1: Data has been emitted while no valid data to send has been previously loaded into the Channel Transmit Shift Register
since the last read of the Status Register.
• RXRDY: Channel Receive Ready
0: Channel Receive Holding Register is empty.
1: Data has been received and loaded in Channel Receive Holding Register.
• OVRUN: Receive Overrun
Automatically cleared by a processor read operation.
0: No data has been loaded in the Channel Receive Holding Register while previous data has not been read since the last
read of the Status Register.
1: Data has been loaded in the Channel Receive Holding Register while previous data has not yet been read since the last
read of the Status Register.
• ENDRX: End of Reception for Channel x
0: The register AC97C_CxRCR has not reached 0 since the last write in AC97C_CxRCR or AC97C_CxRNCR.
1: The register AC97C_CxRCR has reached 0 since the last write in AC97C_CxRCR or AC97C_CxRNCR.
• RXBUFF: Receive Buffer Full for Channel x
0: AC97C_CxRCR or AC97C_CxRNCR have a value other than 0.
1: Both AC97C_CxRCR and AC97C_CxRNCR have a value of 0.
• ENDTX: End of Transmission for Channel x
0: The register AC97C_CxTCR has not reached 0 since the last write in AC97C_CxTCR or AC97C_CxNCR.
1: The register AC97C_CxTCR has reached 0 since the last write in AC97C_CxTCR or AC97C_CxTNCR.
• TXBUFE: Transmit Buffer Empty for Channel x
0: AC97C_CxTCR or AC97C_CxTNCR have a value other than 0.
1: Both AC97C_CxTCR and AC97C_CxTNCR have a value of 0.
AT91SAM9R64/RL64
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6289D–ATARM–3-Oct-11