SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 655

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SAM9RL64

Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9RL64

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
39.5.2.4
Table 39-3.
6289D–ATARM–3-Oct-11
Pixel 1bpp 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Pixel 2bpp
Pixel 4bpp
Pixel 8bpp
Pixel
16bpp
Pixel
24bpp
packed
Pixel
24bpp
packed
Pixel
24bpp
packed
Pixel
24bpp
unpacked
Mem Addr
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
15
Serializer
Little Endian Memory Organization
7
14
not used
0x3
3
1
This block serializes the data read from memory. It reads words from the FIFO and outputs pix-
els (1 bit, 2 bits, 4 bits, 8 bits, 16 bits or 24 bits wide) depending on the format specified in the
PIXELSIZE field of the LCDCON2 register. It also adapts the memory-ordering format. Both big-
endian and little-endian formats are supported. They are configured in the MEMOR field of the
LCDCON2 register.
The organization of the pixel data in the memory depends on the configuration and is shown in
Table 39-3
Note:
13
6
For a color depth of 24 bits per pixel there are two different formats supported: packed and
unpacked. The packed format needs less memory but has some limitations when working in 2D
addressing mode
12
and
1
2
11
Table
5
39-4.
10
(See “2D Memory Addressing” on page
0x2
3
2
9
4
8
7
3
6
0
0
0x1
AT91SAM9R64/RL64
1
674.).
5
2
4
8
8
0
1
7
7
3
6
6
1
5
5
2
4
4
0x0
0
2
3
3
1
2
2
0
1
1
655
0
0
0

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