SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 749

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

41.4.8.9
41.4.8.10
41.4.8.11
41.4.8.12
6289D–ATARM–3-Oct-11
Data OUT
Bulk OUT or Interrupt OUT
Bulk OUT or Interrupt OUT: Receiving a Packet Under Application Control (Host to Device)
Bulk OUT or Interrupt OUT: Sending a Buffer Using DMA (Host To Device)
Like data IN, data OUT packets are sent by the host during the data or the status stage of con-
trol transfer or during an interrupt/bulk/isochronous OUT transfer. Data buffers are sent packet
by packet under the control of the application or under the control of the DMA channel.
Algorithm Description for Each Packet:
Note: If the application does not know the size of the transfer, it may not be a good option to use
AUTO_VALID. Because if a zero-length-packet is received, the RX_BK_RDY is automatically
cleared by the AUTO_VALID hardware and if the endpoint interrupt is triggered, the software will
not find its originating flag when reading the UDPHS_EPTSTAx register.
Algorithm to Fill Several Packets:
If the application doesn’t know the size of the receive buffer, instead of using the BUSY_BANK
interrupt, the application must use RX_BK_RDY.
To use the DMA setting, the AUTO_VALID field is mandatory.
See
information.
DMA Configuration Example:
• ERR_FL_ISO + ERR_FLUSH + ERR_TRANS: The first token IN has been treated, the data
• The application enables an interrupt on RX_BK_RDY.
• When an interrupt on RX_BK_RDY is received, the application knows that UDPHS_EPTSTAx
• The application reads the BYTE_COUNT bytes from the endpoint.
• The application clears RX_BK_RDY.
• The application enables the interrupts of BUSY_BANK and AUTO_VALID.
• When a BUSY_BANK interrupt is received, the application knows that all banks available for
1. First program UDPHS_DMAADDRESSx with the address of the buffer that should be
2. Enable the interrupt of the DMA in UDPHS_IEN
3. Program the DMA Channelx Control Register:
for the second Token IN was not available in time, but the second bank has been validated
before the end of the microframe. The third bank has not been validated, but three
transactions have been set in NB_TRANS.
register BYTE_COUNT bytes have been received.
the endpoint have been filled. Thus, the application can read all banks available.
41.4.8.6 Bulk IN or Interrupt IN: Sending a Buffer Using DMA (Device to Host)
transferred.
– Size of buffer to be sent.
– END_B_EN: Can be used for OUT packet truncation (discarding of unbuffered
packet data) at the end of DMA buffer.
AT91SAM9R64/RL64
for more
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