SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 750
SAM9RL64
Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9RL64
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 750 of 903
- Download datasheet (13Mb)
Figure 41-12. Data OUT Transfer for Endpoint with One Bank
750
USB Bus
Packets
RX_BK_RDY
(UDPHS_EPTSTAx)
FIFO (DPR)
Content
AT91SAM9R64/RL64
Token OUT
Host Sends Data Payload
Written by UDPHS Device
Data OUT 1
Data OUT 1
For OUT transfer, the bank will be automatically cleared by hardware when the application has
read all the bytes in the bank (the bank is empty).
Note: When a zero-length-packet is received, RX_BK_RDY bit in UDPHS_EPTSTAx is cleared
automatically by AUTO_VALID, and the application knows of the end of buffer by the presence
of the END_TR_IT.
Note: If the host sends a zero-length packet, and the endpoint is free, then the device sends an
ACK. No data is written in the endpoint, the RX_BY_RDY interrupt is generated, and the
BYTE_COUNT field in UDPHS_EPTSTAx is null.
– END_BUFFIT: Generate an interrupt when BUFF_COUNT in the
– END_TR_EN: End of transfer enable, the UDPHS device can put an end to the
– END_TR_IT: End of transfer interrupt enable, an interrupt is sent after the last USB
– CHANN_ENB: Run and stop at end of buffer.
UDPHS_DMASTATUSx register reaches 0.
current DMA transfer, in case of a short packet.
packet has been transferred by the DMA, if the USB transfer ended with a short
packet. (Beneficial when the receive size is unknown.)
Host Sends the Next Data Payload
ACK
Microcontroller Read
Set by Hardware
Microcontroller Transfers Data
Data OUT 1
Token OUT
Interrupt Pending
Data OUT 2
NAK
Cleared by Firmware,
Data Payload Written in FIFO
Token OUT
Host Resends the Next Data Payload
Written by UDPHS Device
Data OUT 2
Data OUT 2
6289D–ATARM–3-Oct-11
ACK
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