SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 713

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 40-5. Audio Transfer (PCM L Front, PCM R Front) on Channel x
40.6.2.3
40.6.2.4
6289D–ATARM–3-Oct-11
(Controller Output)
Write access to
AC97C_THRx
(AC97C_SR)
(AC97C_SR)
TXEMPTY
TXRDYCx
AC97FS
AC97TX
Slot #
AC‘97 Output Frame
Receive Operation
TAG
0
transfered to the shift register
The TXEMPTY flag in the AC’97 Controller Channel x Status Register (AC97C_CxSR) is set
when all requested transmissions for a channel have been shifted on the AC-link. The applica-
tion can either poll TXEMPTY flag in AC97C_CxSR or wait for an interrupt notice associated
with the same flag.
In most cases, the AC’97 Controller is embedded in chips that target audio player devices. In
such cases, the AC‘97 Controller is exposed to heavy audio transfers. Using the polling tech-
nique increases processor overhead and may fail to keep the required pace under an operating
system. In order to avoid these polling drawbacks, the application can perform audio streams by
using PDC connected to channel A, which reduces processor overhead and increases perfor-
mance especially under an operating system.
The PDC transmit counter values must be equal to the number of PCM samples to be transmit-
ted, each sample goes in one slot.
The AC’97 Controller outputs a thirteen-slot frame on the AC-Link. The first slot (tag slot or slot
0) flags the validity of the entire frame and the validity of each slot; whether a slot carries valid
data or not. Slots 1 and 2 are used if the application performs control and status monitoring
actions on AC97 Codec control/status registers. Slots [3:12] are used according to the content of
the AC’97 Controller Output Channel Assignment Register (AC97C_OCA). If the application per-
forms many transmit requests on a channel, some of the slots associated to this channel or all of
them will carry valid data.
The AC’97 Controller can also receive data from AC‘97 Codec. Data is received in the channel’s
shift register and then transferred to the AC’97 Controller Channel x Read Holding Register. To
read the newly received data, the application must perform the following steps:
• Poll RXRDY flag in AC’97 Controller Channel x Status Register (AC97C_CxSR). x being one
• Read data from AC’97 Controller Channel x Read Holding Register.
ADDR
of the 2 channels.
CMD
1
transfered to the shift register
PCM L Front
DATA
CMD
2
PCM R Front
L Front
3
PCM
R Front
4
PCM
LINE 1
DAC
5
Center
6
PCM
L SURR
PCM
7
R SURR
PCM
AT91SAM9R64/RL64
8
PCM
LFE
9
LINE 2
DAC
10
11
HSET
DAC
CTRL
12
IO
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