SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 660

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Table 39-10. Dithering Algorithm for Color Mode
Note:
39.5.2.7
660
Frame
N+1
N+1
N+1
N+1
N+1
N+1
N+2
N+2
N+2
N+2
N+2
N+2
…
…
…
N
N
N
N
N
N
Ri = red pixel component ON. Gi = green pixel component ON. Bi = blue pixel component ON. ri = red pixel component OFF.
gi = green pixel component OFF. bi = blue pixel component OFF.
AT91SAM9R64/RL64
green_data_0
green_data_1
green_data_0
green_data_1
green_data_0
green_data_1
blue_data_0
blue_data_1
blue_data_0
blue_data_1
blue_data_0
blue_data_1
Shifter
red_data_0
red_data_1
red_data_0
red_data_1
red_data_0
red_data_1
Signal
…
…
…
both pixels, with the dithering pattern to apply to all of them being DP2_3 = “1101 1011 0110”.
Table 39-10
Dual Scan Configuration, each panel data bus acts like in the equivalent single scan
configuration.)
The FIFO, Serializer, Palette and Dithering modules process one pixel at a time in monochrome
mode and three sub-pixels at a time in color mode (R,G,B components). This module packs the
data according to the output interface. This interface can be programmed in the DISTYPE,
SCANMOD, and IFWIDTH fields of the LDCCON3 register.
The DISTYPE field selects between TFT, STN monochrome and STN color display. The SCAN-
MODE field selects between single and dual scan modes; in TFT mode, only single scan is
supported. The IFWIDTH field configures the width of the interface in STN mode: 4-bit (in single
scan mode only), 8-bit and 16-bit (in dual scan mode only).
For a more detailed description of the fields, see
page
Shadow Level
677.
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
1010
…
…
…
shows the output sequence in the data output bus for single scan configurations. (In
Bit used
…
…
…
3
2
1
0
3
2
3
2
1
0
3
2
3
2
1
0
3
2
Dithering Pattern
1011
1011
0110
0110
1101
1101
1101
1101
1101
1101
1011
1011
1011
1011
0110
0110
0110
0110
…
…
…
“LCD Controller (LCDC) User Interface” on
4-bit LCDD
LCDD[3]
LCDD[2]
LCDD[1]
LCDD[0]
LCDD[3]
LCDD[2]
LCDD[3]
LCDD[2]
LCDD[1]
LCDD[0]
LCDD[3]
LCDD[2]
LCDD[3]
LCDD[2]
LCDD[1]
LCDD[0]
LCDD[3]
LCDD[2]
…
…
…
8-bit LCDD
LCDD[6]
LCDD[3]
LCDD[7]
LCDD[6]
LCDD[4]
LCDD[3]
LCDD[7]
LCDD[6]
LCDD[4]
LCDD[3]
LCDD[7]
LCDD[5]
LCDD[4]
LCDD[2]
LCDD[5]
LCDD[2]
LCDD[5]
LCDD[2]
…
…
…
6289D–ATARM–3-Oct-11
Output
R0
G0
R1
G1
B1
R0
B0
R1
G1
G0
B0
B1
b0
g0
b1
g1
…
…
…
r0
r1